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512MB DDR400 SUPER T
Кликни върху снимката за по-голямо изображение
| 512 MB (64Mx8) |
| DataRate PC-3200 |
| VDD: 2.6V ± 0.1V, VDDQ: 2.6V ± 0.2V for DDR400 |
| Double-data-rate architecture; two data transfers per clock cycle |
| Bidirectional data strobe [DQ] x8) |
| Differential clock inputs(CK and CK) |
| DLL aligns DQ and DQS transition with CK transition |
| Programmable Read latency : DDR400(3 Clock) |
| Programmable Burst length (2, 4, 8) |
| Programmable Burst type (sequential & interleave) |
| Edge aligned data output, center aligned data input |
| Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh) |
| Serial presence detect with EEPROM |
| PCB : Height 1,250 (mil) & single (512MB), double (512MB) sided |
| SSTL_2 Interface |
| 66pin TSOP II package |
